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43Gb/s CP - QPSK Realtime Receiver Demonstrator based on FPGAs and Block - Processing
Realtime Receiver Demonstrator FPGAs Block - Processing
2015/7/16
We present measurement results of an FPGA-based 43Gb/s Realtime Coherent Receiver Demonstrator. Due to limitations we use block-aggregation and process 1/32 of the input data stream. We show back - to...