搜索结果: 1-7 共查到“工学 Error Correction”相关记录7条 . 查询时间(0.109 秒)
INSAR UNWRAPPING ERROR CORRECTION BASED ON QUASI-ACCURATE DETECTION OF GROSS ERRORS (QUAD)
QUAD, InSAR, Unwrapping Error Correction, Gross Error, L1-norm
2018/5/14
Unwrapping error is a common error in the InSAR processing, which will seriously degrade the accuracy of the monitoring results. Based on a gross error correction method, Quasi-accurate detection (QUA...
Physical Information Theoretic Bounds on Energy Costs for Error Correction
Error Correction Linear (n k) code Heat Dissipation Generalized Efficacy Measures Information Loss Fundamental Lower Bounds
2014/12/8
With diminishing returns in performance with scaling of traditional transistor devices, there is a growing need to understand and improve potential replacements technologies. Sufficient reliability ha...
Simple and Scalable WDM/TDMA-PON using Spectral Slicing and Forward Error Correction
Fiber optics communications Networks combinatorial network design
2015/5/22
We describe a simple and scalable WDM/TDMA PON system that uses spectral slicing and FEC in burst-mode upstream transmissions. The sensitivity was improved to -31.5 dB at a sliced bandwidth of 400 GHz...
Soft-decision Forward Error Correction in a 40-nm ASIC for 100-Gbps OTN Applications
40-nm ASIC OTN Application Error Correction
2015/5/15
Soft-decision forward error correction provides high coding gain, but typically with high complexity. We present a soft-decision turbo product code with >11 dB NECG and reasonable complexity in a 40-n...
Application of off-line error correction method software to reproduce random signals on servohydraulic testers
Application off-line correction method software reproduce random signals servohydraulic testers
2010/8/12
A crucial stage of shock absorber manufacturing is the validation process [1-2]. Shock absorbers are evaluated regarding comfort, noise and lifetime, using synthesized or road load data [3-4]. A segme...
FPGA based Prototyping of Next Generation Forward Error Correction
FPGA based Prototyping Generation Forward Error Correction
2015/7/15
The concatenation of LDPC and RS codes has been demonstrated using a real-time FPGA prototype.A net coding gain of 9.0dB for 31.3-Gb/s was achieved with 20.5% redundancy for an input BER of 10 -2 .
Data Rate Enhancement of RSOA-based WDM PON Systems using Feed-forward Equalizer and Forward Error Correction
WDM PON Systems Feed-forward Equalizer
2015/8/6
Effect of FFE and FEC to enhance the data rate of RSOA was investigated. 4.75Gbit/s was achieved by 0.6GHz RSOA using 4-tap FFE and ~14% FEC.